When smaller means better: How device scaling enhances memory performance
Shrinking ferroelectric tunnel junctions can significantly boost their performance in memory devices, as reported by researchers from Science Tokyo. The team fabricated nanoscale junctions directly on silicon substrates and analyzed conduction mechanisms across a wide temperature range and multiple...
February 24, 202685 views
Image: Phys.org
Shrinking ferroelectric tunnel junctions can significantly boost their performance in memory devices, as reported by researchers from Science Tokyo. The team fabricated nanoscale junctions directly on silicon substrates and analyzed conduction mechanisms across a wide temperature range and multiple device scales. They found that smaller junction areas produced much larger resistance contrasts between the "ON" and "OFF" states, demonstrating that miniaturization could directly improve both efficiency and reliability in future non-volatile memory technologies.
Be the first to receive the latest news, market analysis and updates — delivered straight to your inbox.
We value your privacy
We use cookies to run this site and, with your consent, to measure
traffic and improve our content. Necessary cookies are always on. You
can accept all cookies or choose which ones to allow.
Privacy policy.